ARM Cortex-M¶
Summary
- ARM (originally Acorn RISC Machine, now Advanced RISC Machines) is a family of RISC instruction set architectures, designed by Sophie Wilson and Steve Furber at Acorn Computers and first shipped in 1985.1
- Arm Holdings (the company) doesn't manufacture a single chip — it designs and licenses the architecture and core designs, and other companies (Apple, Qualcomm, Samsung, NVIDIA, MediaTek, and dozens more) build the actual silicon.
- It's the dominant architecture in mobile and embedded computing, and — via Apple Silicon and server chips like AWS Graviton — increasingly competitive in laptops and datacenters too.
Think of ARM as:
"A blueprint company, not a construction company — Arm Holdings draws up the plans (and sometimes a finished reference design), and lets dozens of different builders put up the actual buildings."
What Makes ARM Different¶
RISC (Reduced Instruction Set Computer) design favors a smaller set of simple, fixed-cost instructions over CISC's larger set of complex, variable-cost ones (x86 being the classic CISC example). ARM is also a strict load-store architecture — arithmetic and logic instructions only ever operate on registers, never directly on memory; a separate LDR/STR instruction has to move data between memory and registers first.2 Fewer, simpler instructions mean a simpler pipeline, which is a large part of why ARM cores have historically been so power-efficient — the trait that made them the default choice for battery-powered devices.
The other defining trait is the licensing model itself, and it comes in two different forms:
| License Type | What you get | Who does this |
|---|---|---|
| Core (IP) License | A ready-made Arm-designed core (e.g., Cortex-A78) to drop into your own chip | Most SoC vendors — MediaTek, many Qualcomm designs, Broadcom |
| Architecture License | The right to design your own custom core that implements the ARM instruction set | Apple (all its own cores), Qualcomm's Oryon (via the Nuvia acquisition), historically Samsung (Mongoose) and NVIDIA (Denver/Carmel) |
This is the key structural difference from x86: there's no single company building every ARM chip, which is exactly why "ARM" describes an entire ecosystem of very different silicon rather than one company's product line.
ARM Architecture Versions¶
The architecture version (always written ARMv#) is the instruction set itself — separate from any specific chip's name. This is the single most confused pairing in the whole ecosystem: "ARM7" and "ARMv7" are not the same thing, and don't even line up numerically.3
| Version | Year | Key Addition | Notable Implementation |
|---|---|---|---|
| ARMv1 | 1985 | The original architecture — 26-bit addressing, ARM instruction set only | Acorn's internal prototype, never sold commercially |
| ARMv2 | 1986 | Multiply instructions, coprocessor support | ARM2, ARM3 |
| ARMv3 | 1990 | Moved to 32-bit addressing | ARM6, ARM7 |
| ARMv4 / ARMv4T | 1993 / 1995 | ARMv4T added the Thumb 16-bit instruction set — better code density for memory-constrained systems | ARM7TDMI, StrongARM |
| ARMv5 / ARMv5TE | 1999 | Enhanced DSP/multiply instructions, improved Thumb/ARM interworking | ARM9E, ARM10E, Intel XScale |
| ARMv6 | 2001 | SIMD media instructions, VFP (Vector Floating Point); ARMv6T2 added Thumb-2 | ARM11, first-gen Raspberry Pi |
| ARMv7 | 2003–2005 | Split into three profiles — Cortex-A/R/M — replacing the old ARM7/9/11 naming scheme | Cortex-A8, A9; Raspberry Pi 2 |
| ARMv8 | 2011 | Introduced AArch64 — a full 64-bit execution state, alongside 32-bit AArch32 | Cortex-A53, A72; Apple A7; Raspberry Pi ¾ |
| ARMv9 | 2021 | SVE2 (vector/DSP extensions), Confidential Compute Architecture, AI/ML-focused enhancements — built on top of ARMv8 | Cortex-X2/X4, Cortex-A720 |
Table 1. ARM Architecture Version History
Version numbers don't reset per profile
Since ARMv7, each version actually splits into per-profile variants — ARMv8-A, ARMv8-R, ARMv8-M, and so on — because the application, real-time, and microcontroller profiles evolve together but don't need identical feature sets.
32-bit vs 64-bit: AArch32 and AArch64¶
Before ARMv8, everything was 32-bit. ARMv8 introduced two parallel execution states:4
- AArch32 — the 32-bit state, backward-compatible with earlier ARM/Thumb code, using the A32 (ARM) and T32 (Thumb-2) instruction sets
- AArch64 — a new 64-bit state, using the A64 instruction set, with wider registers (31 × 64-bit general-purpose) and a redesigned exception model
A modern 64-bit ARM chip can typically still run 32-bit AArch32 code for compatibility, though newer cores (and Apple Silicon specifically) have started dropping AArch32 support entirely to simplify the chip.
AArch64 vs. ARM64 vs. arm64
These all refer to the same thing. AArch64 is ARM's own official term; Apple, Microsoft, and much of the Linux world commonly just say arm64 or ARM64 instead.4
The Cortex Families¶
Since ARMv7, cores are named Cortex-[profile][number], where the profile tells you the target use case:5
| Family | Profile | Characteristics | Typical Use | Examples |
|---|---|---|---|---|
| Cortex-A | Application | Runs a full OS, MMU, often out-of-order execution | Phones, tablets, laptops, Raspberry Pi | A53, A72, A78, X4 |
| Cortex-R | Real-time | Deterministic, low-latency, hard real-time guarantees | ABS/automotive control, hard drive controllers, modems | R5, R7, R52 |
| Cortex-M | Microcontroller | Smallest, lowest power, simple MPU instead of a full MMU | Microcontrollers, IoT sensors, embedded control | M0+, M4, M33, M55 |
| Neoverse | Infrastructure | Server-grade, high core-count, throughput-optimized | Cloud/datacenter server chips | AWS Graviton, Azure Cobalt, Google Axion |
Table 2. The ARM Cortex and Neoverse Families
Which one is in your device?
- A smartwatch or a Bluetooth sensor → almost certainly Cortex-M
- A car's ABS controller → Cortex-R
- Your phone, a Raspberry Pi, or an M-series Mac → Cortex-A (or Apple's own custom AArch64 core)
- The server behind a cloud API call → increasingly, Neoverse
Real-World Examples¶
| Device | Core | Architecture |
|---|---|---|
| Raspberry Pi 1 | ARM1176JZF-S | ARMv6 |
| Raspberry Pi 2 | Cortex-A7 | ARMv7-A |
| Raspberry Pi 3 | Cortex-A53 | ARMv8-A |
| Raspberry Pi 4 | Cortex-A72 | ARMv8-A |
| Raspberry Pi 5 | Cortex-A76 | ARMv8.2-A |
| Raspberry Pi Pico (RP2040) | Cortex-M0+ | ARMv6-M |
| Apple M1–M4 | Apple-designed (architecture license) | ARMv8-A / ARMv9-A |
| AWS Graviton | Neoverse-based | ARMv8-A / ARMv9-A |
Table 3. ARM Cores in Common Devices
Useful Resources¶
- Arm Developer — Architecture Versions, Profiles, and Variants — the official architecture reference
- WikiChip — ARM Versions
- All About Circuits — The Arm Architecture Explained
-
Wikipedia contributors. (n.d.). ARM architecture family. Wikipedia. https://en.wikipedia.org/wiki/ARM_architecture_family ↩
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All About Circuits. (2019, April 10). The Arm architecture explained. https://www.allaboutcircuits.com/technical-articles/arm-architecture-explained/ ↩
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WikiChip. (n.d.). Versions — ARM. https://en.wikichip.org/wiki/arm/versions ↩
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Wikipedia contributors. (n.d.). AArch64. Wikipedia. https://en.wikipedia.org/wiki/AArch64 ↩↩
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Wikipedia contributors. (n.d.). ARM Cortex-A. Wikipedia. https://en.wikipedia.org/wiki/ARM_Cortex-A ↩